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Posted By: kondapalli Member Level: Gold Posted Date: 05 May 2008
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2007 Jawaharlal Nehru Technological University B.Tech Electronics & computers VLSI TECHNOLOGY Question paper
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1. (a) What are the steps involved in the n MOS fabricationExplain with neat
sketches.
(b) In what way p MOS fabrication is different from n MOS fabrication? [10+6]
2. (a) Explain inverter delays for :
i. Basic 4:1 n MOS inverter
ii. Minimum size C MOS inverter [3+4]
(b) Derive an expression for the rise time and fall time of a C MOS inverter and
explain the factors affecting these quantities [9]
3. Write notes on:
(a) FPGAs
(b) PLAs
(c) PLDs [16]
4. Explain about the design approaches for full custom and semi custom Devices [16]
5. (a) Explain about Automatic test vector generation.
(b) How fault simulation is done and explain fault models with the help of exam-
ples. [6+10]
6. Discuss the following types of simulations
(a) circuit level [4]
(b) logic level [3]
(c) switch level [3]
(d) mixed mode and [3]
(e) timing simulations. [3]
7. (a) Explain the chip bond pads.
(b) Explain ceramic package technology. [8+8]
8. (a) What are the key aspects of switch capacitor?
(b) What are the different methods to design switched capacitor filters in VLSI.
[8+8]
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