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Posted By: kondapalli Member Level: Gold Posted Date: 08 May 2008
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2007 Jawaharlal Nehru Technological University B.Tech Electrical and Electronics COMPUTER ORGANIZATION setno4 Question paper
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1. (a) Draw and explain the instruction cycle state diagram that includes interrupt
cycle processing.
(b) Discuss about transfer of control with multiple interrupts. Demonstrate with
a neat diagram [8+8]
2. Explain about error detecting and correcting codes. What is their relevance
[16]
3. Discuss various key design issues of an instruction format. [16]
4. (a) Differentiate between large register file versus cache.
(b) Discuss how compiler based register optimization is done.
(c) Explain various characteristics of reduced instruction set architectures.
[6+6+4]
5. (a) Explain major differences between cache-main and main-secondary memory
hierarchies
(b) Discuss main features and basic structure of caches. [8+8]
6. (a) Differentiate between I/O techniques with and without the use of interrupts.
(b) Explain different types of I/O commands.
(c) What is isolated I/O. Differentiate between memory-mapped and isolated I/O
with examples. [5+6+5]
7. (a) List sequencing and branching control fields of IBM 3033 microinstruction.
(b) Discuss the functioning of micro sequencer with example [8+8]
8. (a) Differentiate between high-level and low-level parallelism
(b) Discuss about Flynn’s classification of parallel processor systems.
(c) Explain different MIMD interconnection topologies. [5+6+5]
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