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Posted By: murali Member Level: Silver Posted Date: 09 May 2008
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2007 Jawaharlal Nehru Technological University B.E Electrical and Electronics II B.Tech II Semester Supplimentary Examinations, Aug/Sep 2007 LDIC SET I Question paper
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Code No: R05220202 Set No. 1
II B.Tech II Semester Supplimentary Examinations, Aug/Sep 2007
LINEAR AND DIGITAL IC APPLICATONS
( Common to Electrical & Electronic Engineering and Instrumentation &
Control Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
? ? ? ? ?
1. (a) Define input offset voltage and CMRR as applied to Op-amp ICs.
(b) Explain how the above parameters can be measured? [8+8]
2. (a) Explain HWR using inverting and non-inverting configuration.
(b) Explain the operation of astable multivibrator using Op-amp. [8+8]
3. (a) Draw the circuit diagram of a low-pass sallen key filter and determine it’s gain.
(b) Draw the block diagram of a band rejection filter and explain it’s operation.
[8+8]
4. (a) Draw the block diagram of 565 PLL and explain about each block. Make
circuit connections to track the input signal and explain its operation.
(b) Write short notes on :
i. PLL as frequency multiplier.
ii. PLL as frequency translator. [8+4+4]
5. (a) With an example explain the functional diagram of successive approximation
ADC.
(b) Draw the schematic circuit diagram of a Servo A/D converter and explain the
operations of this system.
(c) Compare Servo A/D with other types of A/D converters. [7+6+3]
6. (a) What is meant by Tri-state logic ? Draw the circuit of Tri-state TTL logic
and explain its functions.
(b) Draw the schematic circuit of TTL active pull-up NAND gate and explain its
operation with the help of Truth-Table. [8+8]
7. (a) What is multiplexer? Draw the logic diagram of 4 to 1 line multiplexer?
(b) Design half adder using NAND gates only? [8+8]
8. (a) Write short notes on synchronous up counter.
(b) Explain the operation of Synchronous SRAM with the help of its internal
Architecture. [8+8]
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