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Posted By: bharath Member Level: Diamond Posted Date: 13 May 2008
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2007 Indira Gandhi National Open University (IGNOU) Post Graduate Diploma Computer Application COMPUTER FUNDAMENTAL Question paper
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1. Simplify the following expression using Karnaugh map in product of sum form: F (W,X , Y, Z,)=∑ (0, 1, 2, 3, 4, 6, 7, g, g,11, 15) Also, draw the logic circuit for the simplified expression. (6)
2. Subtract 1010100 - 1000011 using 2 complernent. (3)
3. Convert 2222 in hexadecimanl umber. (2)
4. Write an 8086 assembly language program to convert a 4-digit octal number to its decimal equivalent (8)
5. List the registers that are used by the ALU to perform various tasks. Also, explain how these registers are used. (4)
6. What is a cache memory ? Explain about multiple levels of cache. (4)
7. Differentiate between RISC and CISC architectures. (3)
8. Explain the DMA controller with block diagram. What is meant by a block transfer? (8)
9. What are the various phases of an instruction cycle ? Give the micro operation of fetch and decode phases (5)
10. Compare Static RAM with Dynamic RAM. (2)
11. Using NAND gate generate the AND and NOR functions. (4)
12. What is meant by "addressing mode" ? Explain why the different addressing modes are required. Explain any two addressing modes that need no address field at all. Give suitable example for each. (6)
13. Explain the principles of vector processing. Also, explain various types of vector instructions and their execution. (5)
14. Explain the direct and associative cache mapping. (5)
15. Write a program in 8086 assemblyl anguage to find the user specified number in a list of 15 numbers which is stored in a specific location. (7)
16. Write down the method of converting a binary number into its Gray Code equivalent. Also, give an example. (3)
17. Design a 4-bit shift register, which is capable of shifting its binary information in both the directions along with the facility of parallel loading. (4)
18. Diifferentiate between a hardwired control unit and a micro programmed control unit. (3)
19. What is the difference between a memory mapped I/O and a peripheral mapped l/O ? (2)
20. Draw the circuit diagram of RS flip flop and explain its working. (4)
21. Differentiate between MISD and SISD classification of computers as suggested by Flynn. (2)
22. Simplify the following expression using Karnaugh map in product of sum form : F(A, B, C, D) = ∑ (1,2,3,8,9,10,11, 14) Also, draw the logic circuit for the simplified expression. (6)
23. Perforrn following subtraction using 1 complement : (4) (i) 11001 - 10110 (ii) 11011 - 11001
24. Write an assembly language (8086) program to convert a 4-digit decimal number to its binary equivalent (8)
25. Find the decimal equivalent of hexadecimal number 2BA5. (2)
26. What is decoder? Differentiate between decoder and demultiplexer. (3)
27. Draw and compare the central and distributed bus arbitration schemes. (7)
28. What is an addressing mode ? Explain various addressing modes of 8086 with example for each. (10)
29. Draw the logic diagram of 4-bit odd parity checker. Explain its operation with the help of truth table. (5)
30. Explain with the help of a disagram how the CPU executes an instruction in a computer system. (5)
31. What is the role of a stack in handling the interrupts? What is the difterence between the stack and normal read/write memory? (5)
32. Draw the logic diagram of 3-bit synchronous counter using JK flip-flop. Also, explain its working. (5)
33. Write a program in assembly language (8036) that calculates the sum of 12 + 22 + 32 . . . . . N2 and store the sum of the above series in a user defined data item.
34. What are the benefits of instruction pipelining? Explain its working procedure. Also, discuss the pipeline performance measures.
35. Convert the following program statement to parallel statements : (3) for i: : 1 to N begin for j: : 1 to N begin A(i, j) : 50; end; end;
36. What are the problems which prevent RISC pipelining to achieve maximum speed? (3)
37. Differentiate between control flow and data flow computers. (3)
38. Draw and explain the working of the architectural configurations of SIMD array processors. (6)
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