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Posted Date: 14 Dec 2007 Posted By: Sri Member Level: Gold
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2006 Jawaharlal Nehru Technological University B.Tech Electrical and Electronics Engineering III/Sem1 Regular (NOV)Set 2,Computer Organization Question paper
Code No: RR310201 Set No. 2
III B.Tech I Semester Regular Examinations, November 2006
COMPUTER ORGANIZATION
( Common to Electrical & Electronic Engineering, Electronics &
Communication Engineering, Electronics & Instrumentation Engineering,
Electronics & Telematics and Instrumentation & Control Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
1. (a) How mandatory signal lines for PCI are functionally grouped
(b) Explain typical desktop system using PCI configuration. [8+8]
2. Write an algorithm to find all allowable weights for a ”weighted BCD code”. Assume that all weights are positive numbers [16]
3. Explain various characteristics of machine instructions in detail [16]
4. (a) List and describe floating-point arithmetic instructions of Motorola 88000 instruction set.
(b) Discuss about architecture of Motorola 88000. [8+8]
5. (a) Explain the cache execution of a read operation with a neat diagram
(b) Explain look-aside system organization for caches. [8+8]
6. (a) Discuss about power PC interrupt structure.
(b) Explain various registers in a DMA interface with their purpose.[8+8]
7. (a) Discuss about I/O channel architecture.
(b) Discuss about I/O addressing in 8086.
(c) Discuss the salient features of laser printer [6+6+4]
8. (a) Explain the following terms.
i. Read miss
ii. Read hit
iii. Write miss
iv. Write hit
(b) Discuss different approaches to vector computation [8+8]
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