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Posted By: sasi kala       Member Level: Diamond       Posted Date: 31 May 2008

2007 Anna University B.E Electronic Instrumentation and Control EI 233 — DIGITAL LOGIC THEORY AND DESIGN Question paper



Course: B.E Electronic Instrumentation and Control   University: Anna University




B.E./B.Tech. DEGREE EXAMINATION,
Third Semester
Instrumentation and Control Engineering
EI 233 — DIGITAL LOGIC THEORY AND DESIGN
(Common to Electronics and Instrumentation Engineering)
Time : Three hours Maximum : 100 marks
Answer ALL questions.
PART A — (10 ? 2 = 20 marks)
1. Convert to quinary (base 5).
2. Add the decimals 67 and 78 using excess–3 code.
3. The arithmetic operation (23 + 44 + 14 + 32)r = (223)r is correct in at least one number system. Find r.
4. Express = as sum of minterms.
5. What is a decoder?
6. What is a state diagram?
7. Differentiate between flip–flop and latch.
8. What is a shift register?
9. What is a ripple counter?
10. What is race around condition?
PART B — (5 ? 16 = 80 marks)
11. (i) What is PLA? How is it different from ROM? (4)
(ii) Explain the working of BCD ripple counter with the help of state diagram and logic diagram. (12)
12. (a) (i) Simplify using Karnaugh map
. (12)
(ii) Express using maxterms. (4)
Or
(b) (i) Design a logic circuit to convert the 8421 BCD code to Excess–3
code. (12)
(ii) Reduce . (4)
13. (a) (i) Implement the functions of NOT, AND and OR gates only with NOR gates. (4)
(ii) Explain the working of a full adder with neat diagram and truth table. (12)
Or
(b) (i) Design and explain a comparator to compare two identical words.
(6)
(ii) Implement the following with a multiplexer . (10)
14. (a) (i) Describe the functions of SR flip–flop with diagram and excitation table. (6)
(ii) What is the function of shift register and show how it is used to convert serial input to parallel output with clock waveforms? (10)
Or
(b) (i) Differentiate between sequential and combinational circuits. (4)
(ii) Develop a synchronous three–bit up/down counter with a Gray code sequence. The counter should count up when an up/down control input is 1 and count down when the control input is 0. (12)
15. (a) (i) When are two states Si and Sj equivalent, and When are two machines and equivalent? (4)
(ii) Design a sequential detector, which produces an output every time when the sequence 1101 is detected and an output 0 at all other time. Draw the state diagram as a design tool. (12)
Or
(b) (i) What do you mean by transition diagram? (3)
(ii) Draw a flow table for an asynchronous circuit with two inputs
x1, x2 and one output z. The initial input is x1 = x2 = 0. The circuit should produce 1 output, if and only if the input state is
x1 = x2 = 1 and preceding input state is x1 = 0, x2 = 1. Reduce and merge the flow table. (13)






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