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Posted By: kondapalli Member Level: Gold Posted Date: 29 Jul 2008
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2007 Jawaharlal Nehru Technological University B.Tech Electrical and Electronics Engineering SWITCHING THEORY & LOGIC DESIGN setno4 Question paper
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1. Convert the following to Decimal and then to Binary.
(a) 123416
(b) ABCD16
(c) 11228
(d) 17268
(e) 99710
(f) 65410 [3+3+3+3+2+2]
2. (a) Draw the logic diagram corresponding to following expressions without sim-
plifying them. [8]
i. (A+B) (C+D) (A’+B+D)
ii. (AB+A’B’)(CD’+C’D)
(b) Obtain the complement of the following Boolean expressions. [8]
i. x’yz+x’yz’+ xy’z’+xy’z
ii. x’yz+xy’z’+xyz+xyz’
iii. x’z+x’y+xy’z+yz
iv. x’y’z’+x’yz’+xy’z’+xy’z+xyz’
3. (a) What do you mean by dont care combinations? [4]
(b) What you mean by min terms and max terms of Boolean expressions. [4]
(c) Simplify the Boolean function using K-map F= Pm(0, 1, 3, 4, 5, 6, 7, 8, 9) +
d(10, 11, 12, 13, 14, 15) [8]
4. Design a BCD(B0, B1, B2, B3, B4) to Binary(A,B,C,D,E) converter using logic
gates. [16]
5. (a) Given a 32 x 8 Rom chip with an enable input, show the external connection
necessary to construct a 128 × 8 Rom with four chips and a decoder.
(b) Tabulate the PLA programming table for the four Boolean functions listed
below
A(x,y,z) = e(1, 2, 4, 6)
1 of 2
Code No: R059210203 Set No. 4
B(x,y,z) = e(0, 1, 6, 7)
C(x,y,z) = e(2,6)
D(x,y,z) = e(1, 2, 3, 5, 7). [8+8]
6. (a) Compare synchronous & Asynchronous circuits
(b) Design a Mod-6 synchronous counter using J-K flip flops. [6+10]
7. A clocked sequential circuit is provided with a single input x and single output Z.
Whenever the input produce a string of pulses 1 1 1 or 0 0 0 and at the end of the
sequence it produce an output Z = 1 and overlapping is also allowed.
(a) Obtain State - Diagram.
(b) Also obtain state - Table.
(c) Find equivalence classes using partition method & design the circuit using D
- flip-flops. [4+4+8]
8. (a) Draw the ASM chart for the following state transistion, start from the initial
state T1, then if xy=00 go to T2, if xy=01 go to T3, if xy=10 go to T1, other
wise go to T3.
(b) Show the exit paths in an ASM block for all binary combinations of control
variables x, y and z, starting from an initial state. [8+8]
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