New Member FAQ | Forums | Earn Revenue


Resources Entrance Ask Experts Exam Papers Jobs English Projects Universities Colleges Courses Schools Training My India



My Profile
Active Members
TodayLast 7 Days more...



Awards & Gifts
Online Exams

Fresher Jobs


Our fresher job section is exclusively for fresh graduates! Find jobs for freshers in major Indian cities including Bangalore, Chennai, Hyderabad, Pune or Kochi

Resources


Find educational articles, blogs, discussion threads and other resources.

Colleges


Find details about any college in India or search for courses.

website counter



Download Model question papers & previous years question papers

Posted Date: 05 Sep 2008      Posted By: k vishaal       Member Level: Gold

2008 Jawaharlal Nehru Technological University R05310201 Set No. 3,III B.Tech I Semester Supplimentary Examinations, February 2008,COMPUTER ORGANISATION Question paper



Course: B.Tech   University: Jawaharlal Nehru Technological University




Code No: R05310201 Set No. 3
III B.Tech I Semester Supplimentary Examinations, February 2008
COMPUTER ORGANISATION
( Common to Electrical & Electronic Engineering, Electronics &
Communication Engineering, Electronics & Instrumentation Engineering,
Electronics & Control Engineering and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
? ? ? ? ?
1. (a) Explain about various buses such as internal, external, backplane, I/O, system,
address, data, synchronous and asynchronous. [10]
(b) Distinguish between high level and low level languages? What are the require-
ments for a good programming language? [6]
2. Design a circuit to increment, decrement, complement and clear a 4 bit register
using RS flip-flops. Explain the control logic. [16]
3. (a) Differentiate between microprogramming and nanoprogramming. [8]
(b) Hardwired control unit is faster than microprogammed control unit. Justify
this statement. [8]
4. (a) How many bits are needed to store the result addition, subtraction, multipli-
cation and division of two n-bit unsigned numbers. Prove. [8]
(b) What is overflow and underflow? What is the reason? If the computer is
considered as infinite system do we still have these problems. [8]
5. Compare and contrast Asynchronous DRAM and Synchronous DRAM. [16]
6. What are the different kinds of I/O Communication techniques? What are the
relative advantages and disadvantages? Compare and contrast all techniques. [16]
7. Explain the following with related to the Instruction Pipeline
(a) Pipeline conflicts
(b) Data dependency
(c) Hardware interlocks
(d) Operand forwarding
(e) Delayed load
(f) Pre-fetch target instruction
(g) Branch target buffer
(h) Delayed branch. [8×2=16]
8. (a) Explain the working of 8 x 8 Omega Switching network.
1 of 2
Code No: R05310201 Set No. 3
(b) Explain the functioning of Binary Tree network with 2 x 2 Switches. Show a
neat sketch. [8+8]
? ? ? ? ?
2 o





Return to question paper search

Next Question Paper: R05310201 Set No. 4,III B.Tech I Semester Supplimentary Examinations, February 2008,COMPUTER ORGANISATION

Previous Question Paper: R05310201 Set No. 3,III B.Tech I Semester Supplimentary Examinations, February 2008,COMPUTER ORGANISATION

Related Question Papers:


  • III B.Tech Supplimentary Examinations, Aug/Sep 2008,COMPILER DESIGN


  • HELICOPTER AERODYNAMICS Set No 3


  • IV B.Tech. I Semester Regular Examinations_POWER SYSTEM OPERATION & CONTROL


  • C’ PROGRAMMING & DATA STRUCTURES(R05) SET No-3


  • TRANSPORTATION ENGINEERING (Civil Engineering) - Set 3


  • Categories


    Submit Previous Years University Question Papers and make money from adsense revenue sharing program

    Are you preparing for a university examination? Download model question papers and practise before you write the exam.



    Advertise Here





    Contact Us   Advertise   Editors    Privacy Policy    Terms Of Use   

    ISC Technologies.
    2006 - 2009 All Rights Reserved.