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Posted By: sibasish Member Level: Gold Posted Date: 14 Sep 2008
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2007 Biju Patnaik University of Technology B.Tech Computer Science & Engineering COMPUTER ARCHITECTURE AND ORGANIZATION-II 6TH SEM CLASS TEST-2 MAX. MARKS-10 Question paper
Answer all questions. All questions carry equal marks.
1.Name the three important technique used for proper synchronization between the processor and I/O device
2.Draw the architectural diagram of five stage pipeline processor having instruction queue.
3.Define interrupt latency? Which signal is more convenient to use as interrupt request signal?
4.Reorder the following set of instruction so that branch delay slot in two stage pipeline (IF, IE) can be used properly
LOOP shift_left R1
Decrement R2
Branch !=0 LOOP
Add R1,R3
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