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Posted Date: 01 Dec 2008 Posted By: Sunil Reddy Member Level: Platinum
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2005 Jawaharlal Nehru Technological University Mechanical Engineering III B.Tech. I Semester Supplementary Examinations, May -2005 DIGITAL IC APPLICATIONS Question paper
Code No: RR310401 Set No.4
III B.Tech. I Semester Supplementary Examinations, May -2005
DIGITAL IC APPLICATIONS
(Electronics & Communication Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
? ? ? ? ?
1. (a) Draw the transistor logic inverter circuit and analyze the circuit behavior with
the help of transfer characteristics?
(b) Design a CMOS transistor circuit that has the functional behavior
f (Z) = (A + ¯B )(B + C)
2. (a) Design a transistor circuit of 2-input ECL NOR gate? Explain the operation
with the help of function table?
(b) Compare CMOS, TTL and ECL with reference to logic levels, DC Noise mar-
gin, propagation delay and fanout?
3. (a) What is the importance of time dimension in VHDL and explain its function?
(b) Design the logic circuit and write a data-flow style VHDL program for the
following function?
F (X) = A,B,C,D (0,1,3,5,14) + d(8,15)
4. (a) Realize the following expression using 74×151 IC
f (Y) = AB + BC + AC
(b) Write a data flow style VHDL program for a simple 8-bit multiplexer?
5. (a) Show the logic diagram of 74×283 binary adder? Explain the principle of
generating sum and carry at every stage using the logic diagram?
(b) Design a 24-bit group ripple adder using 74×283 Ics?
6. (a) Design a 4-bit binary synchronous counter using 74×74? Write VHDL pro-
gram for this logic?
(b) Design a modulo-60 counter using 74×163 ICs?
7. (a) What is the difference between ring counter and Johnson ring counter? Design
a self-correcting 4-bit, 4-state ring counter with a single circulating 0 using
74x194?
(b) Design a 3-bit LFSR counter using 74x194? List out the sequence assuming
that the initial state is 101?
8. (a) Draw the basic cell structure of Dynamic RAM? What is the necessity of
refresh cycle? Explain the timing requirements of refresh operation?
(b) Discuss in detail ROM access mechanism with the help of timing waveforms?
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