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Posted Date: 27 Jul 2009 Posted By: suresh Member Level: Gold
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2009 Jawaharlal Nehru Technological University Electronics & Communications Engineering Jntu Hyderabad III B.Tech II Semester Regular Examinations, Apr/May 2009,Code No: R05320402 ,VLSI DESIGN Question paper
Code No: R05320402 Set No. 2
III B.Tech II Semester Regular Examinations, Apr/May 2009
VLSI DESIGN
( Common to Electronics & Communication Engineering, Bio-Medical
Engineering and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
? ? ? ? ?
1. Write in detail about integrated passive components. [16]
2. (a) Explain the operation of BiCMOS inverter? Clearly specify its characteristics.
(b) Explain how the BiCMOS inverter performance can be improved. [8+8]
3. (a) what is a stick diagram? Draw the stick diagram and layout for a CMOS
inverter.
(b) What are the effects of scaling on Vt?
(c) What are design rules? Why is metal- metal spacing larger than poly -poly
spacing. [8+4+4]
4. (a) Determine an equation for the propagation delay from input to output of the
pass transistor chain shown in figure 4a with the help of its equivalent circuit.b) What are super Buffers? [12+4]
5. (a) Explain how a Booth recoded multiplier reduces the number of adders.
(b) Draw circuit diagram of a one transistor with transistor capacitor dynamic
RAM and also draw its layout. [8+8]
6. (a) Draw the typical architecture of PAL and explain the operation of it.
(b) What is CPLD? Draw its basic structure and give its applications. [8+8]
7. (a) What is meant by enumeration type of data and give some example for it?
(b) What are the different Libraries used in VHDL? Write the syntax to load it.
(c) Explain how the delay of a statement is related to simulation and synthesis.
[6+6+4]
8. (a) What is ATPG? Explain a method of generation of test vector.(b) Explain the terms controllability, observability and fault coverage.
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