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Posted By: kannan.p       Member Level: Silver       Posted Date: 23 Mar 2008

2007 Anna University B.E Computer Science Computer Architecture Question paper



Course: B.E Computer Science   University: Anna University




B.E./B.TECH DEGREE EXAMINATION MAY/JUNE 2007
Fourth semester
Computer science and Engineering
CS 1251 – COMPUTER ARCHITECTURE
Part – A
1. Why data bus is bidirectional and address bus is unidirectional in most microprocessors?
2. What are limitations of assembly language?
3. Why floating number is more difficult to represent and process than integer?
4. Draw a full adder circuit and give the truth table.
5. Define pipeline speedup.
6. State the difference between hardwired and microprogrammed control unit.
7. List the factors that determine the storage device performance.
8. How many 128*8 Ram chips are needed to provide a memory capacity of 2048 bytes?
9. Why does DMA have priority over the CPU when both request a memory transfer?
10. What is the advantage of using interrupt initiated data transfer under program control without interrupt?


Part – B
11.(a)(i) What is a stack? Illustrate the use of stack in subordinate processing with suitable diagram.
(ii) Describe different types of addressing modes in detail.
(OR)
(b)(i) Briefly explain any six I/O operations with an example.
(ii) Illustrate memory read and write operations.

12. (a)(i) Give the block diagram of the hardware implementations of addition and subtraction of signed number and explain the operations with flow chart.
(ii) Explain the representations of floating point numbers in detail.
(OR)
12. (b)(i) Design a multiplier that multiplies two 4-bit numbers.
(ii) Describe the algorithm for integer division with suitable example.
13. (a)(i) Explain the execution of an instruction with diagram.
(ii) Explain the function of a six segment and draw a space diagram for a six segment pipeline showing the time it takes to process eight tasks.
(OR)

13. (b)(i) Explain how the performance of the instruction pipeline can be improved .
(ii) Explain multiple bus organization in detail.
14. (a)(i) What is virtual memory? Explain how the logical address in translated into physical address in the virtual memory system with a neat diagram.
(ii)Describe the organization of a typical RAM chip.
(OR)
14. (b)(i) Explain the organization of magnetic disk in detail.
(ii) A digital computer has a memory unit 64k*16 and a cache memory of 1k words. The cache uses direct mapping with a block size of four words. How many bits are there in the tag, index, block and word fields of the address format? How many blocks can the cache accommodate?
15. (a)(i) Design parallel priority interrupt hardware for a system with eight interrupt sources.
(ii) Describe the functions of SCSI with neat diagram.
(OR)
15. (b)(ii) What is the importance of an I/O interface? Compare features of SCSI and PCI interfaces.
(ii) What are the different input and output signals of DMA controller? Why are the read and write control signals are bidirectional? Under what condition and for what purpose they are used as inputs and outputs?





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