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Posted By: Nitin Bajaj - Editor Member Level: Diamond Posted Date: 29 Mar 2008
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2007 Jawaharlal Nehru Technological University B.Tech MICROPROCESSORS AND MICROCONTROLLERS (Instrumentation & Control Engineering) - Set 4 Question paper
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III B.Tech II Semester Supplimentary Examinations, Aug/Sep 2007 MICROPROCESSORS AND MICROCONTROLLERS (Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????
1. (a) What is the length of the instruction queue in 8086? Discuss the use of the queue? Explain the reason for limiting the length of queue? (b) What is the minimum number of segment resisters that are necessary to provide segmentation? How do access common data for di?erent programs using segmentation? [8+8]
2. (a) Explain with example how a far procedure is declared as PUBLIC? Show how an external near procedure is called in main program? (b) Discuss the assembler directives with examples? [6+10]
3. (a) Show the circuit required to generate the upper and lower I/O strobes in minimum and maximum modes of 8086? (b) What is the minimum no. of bus cycles that can occur between the time an interrupt request is recognized and the ?rst instruction in the interrupt service routine is fetched. Draw the interrupt acknowledge cycle? [7+9]
4. What is the di?erence between simple I/O, strobbed I/O and bi-directional I/O with reference to 8255? Discuss the required control signals and their timing sequence for each mode of operation? [16]
5. (a) Draw the block diagram of 8251 and explain each block? (b) Discuss the serial data transmission standards and their speci?cations?[10+6]
6. (a) Which interrupt type is associated with NMI? Mention its vector address? (b) What is the purpose of IF ?ag in handling the interrupts? (c) Which interrupt type is associated with TF ?ag? What is the vector address? Explain the use of this interrupt? [5+5+6]
7. In an SDK-86 kit 64KB SRAM and 32KB EPROM is provided on system and provision for expansion of another 64KB SRAM is given. The on system SRAM address map is from 00000H to 0FFFFH and that of EPROM is from F8000H to FFFFFH. The expansion slot address map is from 80000H to 8FFFFH. The size of SRAM chip is 32KB. EPROM chip size is 16KB. Give the complete memory interface and also the address map for individual chips? [16]
8. Interface two 8255’s to 8051 with starting address of 0FFF0H? Show the hardware design? Write the instruction sequence to initialize all ports of 8255?s as input ports in mode 0.
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