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Posted Date: 04 Apr 2008 Posted By: Nitin Member Level: Platinum
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2007 Jawaharlal Nehru Technological University B.Tech COMPUTER ORGANIZATION - Set 2 Question paper
III B.Tech I Semester Regular Examinations, November 2007 COMPUTER ORGANIZATION ( Common to Electrical & Electronic Engineering, Electronics & Communication Engineering, Electronics & Instrumentation Engineering, Electronics & Telematics and Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????
1. (a) What is instruction Cycle ? (b) Elaborate the characteristics of a hypothetical machine (c) What do you mean by hardwired program? [6+6+4]
2. (a) Find the output binary number after performing the following arithmetic operations i. 111.01 + 10.111 ii. 11.01 + 110.11 iii. 110.11 - 111.01 (b) Explain about the longhand division of binary integers. [6+10]
3. Discuss about various Pentium addressing modes with algorithms. [16]
4. (a) Di?erentiate between large register ?le versus cache. (b) Discuss how compiler based register optimization is done. (c) Explain various characteristics of reduced instruction set architectures. [6+6+4]
5. (a) Elaborate on functioning of inverted page table structure. (b) Di?erentiate between ordinary page table and inverted page table (c) Why translation-look-aside bu?er is used.
6. (a) Di?erentiate between characteristics of various types of disks (b) Elaborate on ?xed and movable head disks. [6+6+4] [8+8]
7. (a) On which types of information, a conditional branch instruction depends? (b) Explain about IBM 3033 control address register (c) Discuss about characteristics and terminology of microinstruction spectrum [5+5+6]
8. (a) Why special handling is required for branch instruction in a pipelined processor. Explain with examples. (b) How would you determine the number of pipeline stages in a pipelined processor [10+
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