My Profile
Active Members
TodayLast 7 Days
more...
Awards & Gifts
Online Exams
Fresher Jobs
Our fresher job section is exclusively for fresh graduates! Find jobs for freshers in major Indian
cities including Bangalore, Chennai, Hyderabad, Pune or Kochi
Resources
Find educational articles, blogs, discussion threads and other resources.
Colleges
Find details about any college in India or search for courses.
|
Download Model question papers & previous years question papers
|
Posted By: CONFIDENCE IS THE COMPANION OF SUCCESS Member Level: Diamond Posted Date: 16 Apr 2008
|
2007 Anna University B.E Computer Science Computer Architecture Question paper
|
|
|
MODEL QUESTION PAPER
V SEMESTER
B.E. COMPUTER SCIENCE ENGINEERING
COMPUTER ARCHITECTURE
Time: 3hrs Max Marks: 100
Answer all Questions
PART – A (10 x 2 = 20 Marks)
1. What are the three ways to represent a negative number and give an example for each one.
2. Why do we need biased exponent representation in floating point numbers?
3. Write Booth’s expression for a signed binary number, 110101
4. Construct a four-segment floating-point adder pipeline and specify the operation to be performed in each segment.
5. Compute the number of clock pulse needed to process 100 tasks in a eight segment pipeline.
6. A processor has a microinstruction format containing 8 separate control fields C0:C7. Each Ci can activate any one of Ni ( i varies from 1 to 8) distinct control lines, where N1 = 5, N2 = 3, N3= 9, N4=1, N5=7, N6=12, N7=2, N8=3. What is the width of the control field (i) In case Vertical Microprogramming? (ii) in case of Horizontal Microprogramming.
7. What additional logic is required to give a no-match result for a word in an associative memory when all key bits are zero?
8. Compare and contrast LRU and LFU replacement policies.
9. What is PCI interrupts?
10. Write any two Communication methods.
PART – B (5 x 16 = 80 Marks)
11. With a neat diagram, explain the internal organization of a digital computer.
12.a) Draw the circuit diagram for 4 bit binary adder and subtractor and explain how this can be used to construct BCD Adder / Subtractor.
(OR)
12.b)i) Explain the Booth’s Multiplication algorithm for binary numbers by considering 10101 and 101 as examples.
ii) Describe the modified Booth’s algorithm for the same example.
13.a) Discuss the various methods of Microprogramming Sequencing Techniques with examples.
(OR)
13.b) Write Short notes on (i) Nano Programming and (ii) Super Scalar Processing
14.a) Explain the concept of Virtual memory with paging hardware and software. Consider the following case as example: A virtual memory and main memory address spaces are of sizes 8K and 4K respectively.
(OR)
14.b) Briefly explain the Set-Associative Mapping by considering a main memory of size 1MB and a Cache memory of size 4k. Compute the width of the cache memory, if a two-way set associative mapping is used. Assume the width of the data bus
15.a) Explain Direct Memory Access mode of data transfer with neat sketch.
(OR)
15.b) Briefly explain the interrupt initiated I/O and describe how the priority is assigned to the interfacing devices.
Return to question paper search
|
|
|
Submit Previous Years University Question Papers and make money from adsense revenue sharing program
Are you preparing for a university examination? Download model question papers
and practise before you write the exam.
|
Watch TV Channels
|