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Posted By: B.Rajashree Member Level: Silver Posted Date: 21 Nov 2007
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2007 Anna University B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2007. Question paper
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B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2007.
Third semester
(Regulation 2004)
Computer Science and Engineering
CS 1202 – DIGITAL PRINCIPLES AND SYSTEM DESIGN
(Common to Information Technology)
(Common to B.E. (Part-Time) Second Semester Regulation 2005)
Time: Three hours Maximum: 100 marks
Answer ALL questions.
PART-A – (10*2 = 20marks)
1. What are error detecting codes?
2. Find the compliments for the following functions
(a) F1 = x y’ + x’ y
(b) F2 = (x y + y’ z + x z) x
3. Draw the circuit diagram for 3 bit parity generator.
4. What are the drawbacks of K-Map method?
5. What is logic synthesis in HDL?
6. When an overflow condition will encounter in an accumulator register?
7. What is gate level modeling?
8. What are the differences between sequential and combinational logic?
9. Draw the logic diagram for D-Type Latch?
10. What are the assumptions made for pulse mode circuit?
PART-B – (5*16 = 80marks)
11. (a) Using Tabulation method simplify the Boolean function
F(w ,x, y, z) = m(2,3,4,6,7,11,12,13,14) which has the don’t care conditions d(1,5,15).
OR
(b) Simplify the Boolean function using Variable Entered Mapping method and implementation using gates
F(w, x, y, z) = m(0,2,4,6,8,10,12,14).
12. (a) (1) Design a combinational circuit to convert gray code to BCD. (12)
(2) Design a Full adder circuit with a Decoder. (4)
OR
(b) Design a 4 bit magnitude comparator to compare two 4 bit numbers.
13. (a) Implement the Boolean function using 8:1 multiplexer
F(A,B,C,D) = AB’D + A’C’D + B’CD’ + AC’D.
OR
(b) Explain the different types of ROM.
14. (a) Construct a full subtractor circuit and write a HDL program module for the same.
(1) Compare synchronous with Asynchronous counters. (8)
(2) Explain the behavioral Model with suitable example. (8)
OR
(b) (1) A positive edge triggered flip-flop has two inputs D1 and D2 and a control input that chooses between the two. Write an HDL behavioral of this flip-flop. (8)
(2) Construct and explain 4 stage Johnson counter. (8)
15. (a) (1) Explain the need for key debounce circuit. (8)
(2) What is the objective of state assignment in asynchronous circuit? Give hazard-free realization for the following Boolean functions
F(A,B,C,D) = M(0,1,5,6,7,9,11) (8)
OR
(b) An asynchronous sequential circuit is described by the following excitation and output function
B = (A1’ B2) B + (A1 + B2)
C = B
(1) Draw the logic diagram of the circuit. (5)
(2) Derive the transition table and output map. (6)
(3) Describe the behavior of the circuit. (5)
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