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Posted Date: 05 Jun 2012 Posted By:: Niral Patel Member Level: Gold Points: 5 (Rs. 1)
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2009 Rashtrasant Tukadoji Maharaj Nagpur University B.E Electronics & Communication Engineering Summer 2009, Faculty of Engineering and Technology, COMPUTER ORGANISATION Question paper
Section A
1. Explain prototype structure, performance measurement and queuing models steps of processor level design.
2. (a) Mutiply using Booths algorithm:
(i) -13*12
(ii) 14*-9
(b) Describe the IEEE 754 standard floating point number format with suitable example.
3. (a) With suitable example, explain the various addressing modes. Give significance importance of each.
(b) Using non-restoring method solve: 9/4
4. (a) Explain the following:
(i) Control memory
(ii) Micro program
(iii) Emulator
(iv) Micro-assembler
(b) Explain in brief Bit Sliced ALU.
5. Write short notes on any THREE:
(i) Hardwired control
(ii) Micro instruction sequencing
(iii) Co processors
(iv) Array processors.
Section B
6. Explain in detail address mapping techniques used in Cache memory giving suitable memory of each.
7. (a) List the different characteristics of a memory device.
(b) Design a 4K*8 bits RAM using 1K*2 bits RAM.
8. (a) What is bus arbitration? Explain polling scheme for bus arbitration.
(b) Explain the concept and advantages of parallel processing with appropriate example.
9. (a) Explain the process of DMA data transfer.
(b) Briefly describe local and long distance communication.
(c) What is meant by "Cycle stealing"?
10. Write short notes on:
(i) Vector processor
(ii) RISC processor
(iii) I/O processor.
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