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CS1251-Computer Architecture(Two marks)


Posted Date: 19 Mar 2008    Resource Type: Articles/Knowledge Sharing    Category: General

Posted By: Logeshwaran       Member Level: Gold
Rating:     Points: 5



Secondary Storage


1. Explain very briefly about ESDI Hard Drive

ESDI stands for enhanced small device interface was developed by a consortium of several manufacturers. ESDI converts the data into serial bit streams and uses the RLL encoding scheme to pack more bits per sector. ESDI drives store a defect map containing the locations of bad and defective sectors on the drive.

2. Explain in brief about IDE

Integrated device electronics contains an integrated controller with the drive as a single unit. Interface is a simple 16-bit parallel data interface and requires the data to be written and does not need to be told where and how to write the data on the disk. .IDE Interface supports 2 drives – one drive has to be configured as the master and the second as the slave.

3. What is SCSI?

Small computer system interface can be used for all kinds of devices including RAID storage subsystems and optical disks for large- volume storage applications.

4. What are the two types of latencies associated with storage?

The latency associated with storage is divided into 2 categories

1. Seek Latencies which can be classified into Overlapped seek, Mid transfer seek and Elevator seek

2. Rotational Latencies which can be reduced either by Zero latency read or Write and Interleave factor.


5. What are the data management activities involved in a storage?

a. Command queuing : allows execution of multiple sequential commands with system CPU intervention. It helps in minimizing head switching and disk rotational latency

b. Scatter – gather : Scatter is a process whereby data is set for best fit in available block of memory or disk. Gather reassembles data into contiguous blocks on disk or in memory

6. What do you mean by Disk Spanning?

Disk spanning is a method of attaching drives to a single host uadapter. All drives appear as a single contiguous logical unit. Data is written to the first drive first and when the drive is full, the controller switches to the second drive, then the second drive writes until its full.

7. List some objectives for using RAID Systems

RAID systems are used to meet the following objectives
Hot backup of disk systems
Large volume storage at lower cost
Higher performance at lower cost
Ease of data recovery
High MTBF


8. What are the different levels RAID?

There are six discrete levels of RIAD functionality. They are

a. Level 0 – Disk Striping

b. Level 1 – Disk Mirroring

c. Level 2 – Bit Interleaving of Data

d. Level 3 – Bit Interleaving with dedicated parity drives

e. Level 4 – Sector interleaving of data with dedicated parity drive

f. Level 5 – Block interleaving of data.

9. What do you mean by Write Behind caching with write Coalescing?

Write behind is the delayed write process that is , the data is not written to the disk. Instead it is written to a write buffer resulting in quicker writes. Write coalescing coalesces multiple write requests in a single disk revolution thereby improving performance.


10. Give the classification of the Optical Media

Optical media can be classified as
CD-ROM – Compact Disk Read Only Memory
WORM – Write Once Read Many
Rewriteable - Erasable
Multifunction – WORM and Erasable

11. What is a Mini Disk?

Minidisk for data (MD-Data) is the data version of the new rewriteable storage format developed by sony Corporation for both business and entertainment as a convenient medium for carrying music , video and data. MD can be used in three formats to support all potential uses as follows
A premastered optical disk
A recordable magneto-optical disk
A hybrid that is partially mastered and partially recorable

12. List some applications for WORM.

Some of the application or WORM devices are
On-Line catalogs such as automobile partys dealer
Large Volume Distribution
Transaction logging such as stock trading company
Multimedia Archival

13. What are multifunctional drives

A multifunctional drive is a single unit which is capable of reading and writing a variety of disk media. This type of drive provides the permanence of a read-only device as well as full flexibility of a rewriteable device along with the powerful intermediate write once capability

14. What are types of technology used in s multifunctional drive?


Three types of technologies utilized for multifunctional drives are

Magneto – Optical Disk for both rewriteable and WORM capability
Magneto- Optical disk for rewriteable and dye polymer disk for WORM capability
Phase change technology for both rewriteable and WORM capability

15. What is Migration and Archiving?


The process of moving an object from one level in the storage hierarchy to another level in that hierarchy is called migration. Migration of Objects to off-line media and removal of these objects from on-line media is called archiving.


16. How do we use a jukebox?

A juke box is used for storing large volumes of multimedia information in one cost effective store . Jukebox – based optical disk libraries can be networked so that multiple users can access the information. Opticla disk libraries serve as nearline storage for infrequently used ata.

17. List a few requirements imposed by advanced multimedia applications

Some of the requirements imposed by multimedia application aere
Support for windows – based GUI, such as Microsoft Windows
Capability to run applications in Multitasking environments
Support for Multi – User Applications
Network – bases client –server distributed applications


18. What is the use of High water marks in a cache?

Cache design use a high-water mark and a low water mark to trigger cache management operations. When the cache storage fiklls up to the high – water mark , the cache manager starts creating more space in cache storage. Space is created by discarding objects that have not been modified and writing back those object that have been modified.

19. What are the various cache usage in a LAN –based system?

In a LAN – based system there can be as many as three stages of caches as follows

1. Disk Cache or System memory cache

2. Hard Disk cache for each object server

3. Shared network cache for all object servers

20. What are the multimedia applications which use caches?

Some Mulitmedia application areas where cache is extensively used are
Multimedia Entertainment
Education
Office Systems
Audio and video Mail


Computer Architecture - Set 6


51. Defien the term RELIABILITY and AVAILABLITY.


RELIABILITY

“Means feature that help to avoid and detect such faults. A realible system does not silently continue and delivery result that include interrected and corrupted data, instead it corrects the corruption when possible or else stops


AVAILABLITY:

“Means features that follow the systerm to stay operational even offen faults do occur. A highly available systerm could dis able do the main functioning portion and continue operating at the reduced capacity”


52. Difference between asynchronous bus and synchronous bus.
Synchronous bus
Asynchronous bus

1. Synchronous bus on other hand contains synchronous clock that is used to validate each and every signal.
It is also synchronizing clock that is used to validate each and every signal. when it is specified clock speed is set for all time.

2 .Synchronous buses are affected noise only when clock signal occurs.
Asynchronous buses can mistake noise pulses at any time for valid handshake signal.

3. A master that receives the bus grant signal and it requesting the bus must not propagate it on down the deisgn chain.
The system control which receives the bus grant signal in VME bus .The other name for Synchronous is VME bus.

4. Synchronous bus designers must control with meta stability when attempting different clock signal Frequencies.
Asynchronous bus designer must deal with events that like synchronously.

5. Synchronous bus of meta stability arises in any flip flop. when time will be violated.
It must contend with meta stability when events that drive bus transaction.

6. Synchronous flipflop can range from nanoseconds to microseconds its range is from 20-45 nanoseconds.
When flip flop experiences effects can occur in downstream circurity unless proper design technique which are used.



53. List out the Technique used for speeding up of Multiplication process.

There are two technique for speeding up the multiplication operation.

1)the first technique guarantee that the maximum number of summands that must be added is n/2 for n-bit operands

2)The second technique reduces the time needed to add the summands.


54. Differentiate between RISC (Reduced Instruction Set Computer)

And CISC (Complex Instruction Set Computer)


RISC(reduced instruction

set computer)
CISC(complex instruction

set computer)



1) RISC is fully emphasized on hardware.
1) CISC is fully emphasized

on software.

2)RISC machines generally have a relatively Small and simple instruction set.
2) CISC machines generally have a relatively large and complicated instruction set.

3)RISC requires only fewer transistors.
3) CISC requires more transistors.

4)This simplified design can result in faster

and less expensive processor development , greater reliability and faster

instruction execution times.
4) This simplified design can result in slower and more expensive processor

development, less reliability and slow

instruction execution time when compared to RISC.

5) RISC is a micro processor that requires only limited number of instructions.
5) CISC is also a microprocessor that requires large number of instructions.

6)It has small codes and high cycles per second.
6) It has large codes and low cycles per second.

7) RISC instruction set provides simple instructions intended for more direct

implementation of high level language operations and program sequencing

control structures.
7) CISC instruction set provides any powerful instructions intended for more direct implementation of high –level language operations and program

sequencing control structures.

8)RISC instructions are well suited to pipelined execution that leads to high execution rates.
8)CISC instructions are not suited for the

pipelined execution.

9) RISC advantage is that they can be used effectively by optimizing

compiler.
9) CISC cannot be effectively used by the

optimizing compiler.

10) Because of small instruction handling and sequencing control , chip

area needed for more space is available for

larger register sets.
10) Because of larger instruction handling

and sequencing control ,chip area needed for more space is not available for larger register sets.






















































55. Define absolute address?
An absolute address in computing is the precise indication of a memory location without the use
of any intermediate reference. This is when the memory address indicated contains the data needed.
Synonyms: explicit address, specific address.

Computer Architecture - Set 5


41. Write short notes on instruction pipelining?

Ø It is a technique which a sequential process into sub operations.

Which each sub operation can be performed in a dedicated proceeding segments that are executed concurrently with all other segment


42. State different types of hazards that can occur in pipeline.

The types of hazards that can occur in the pipelining were,

1. Data hazards.

2. Instruction hazards.

3. Structural hazards.

Data hazards:

A data hazard is any condition in which either the source or the destination operands of an instruction are not available at the time expected in pipeline. As a result some operation has to be delayed, and the pipeline stalls.

Instruction hazards:

the pipeline may be stalled because of a delay in the availability of an instruction. For example, this may be a result of miss in cache, requiring the instruction to be fetched from the main memory. Such hazards are called as Instruction hazards or Control hazards.

Structural hazards:

The structural hazards is the situation when two instructions require the use of a given hardware resource at the same time. The most common case in which this hazard may arise is access to memory.


43. What is Register Renaming?

If a temporary register assumes the role of the permanent register whose data it is holding and is given the same name is called as the Register Renaming.


44. What is the function of commitment unit?

When out-of-order execution is allowed, a special control unit called as “commitment unit” is used to guarantee in-order commitment. It uses a queue called the “reorder buffer” to determine which instruction should be committed next. This is the function of commitment unit.


45. What are the classification of data hazards?

Classification of data hazard:

A pair of instructions can produce data hazard by referring reading or writing the same memory location. Assume that i is executed before J.So, the hazards can be classified as,

1. RAW hazard

2. WAW hazard

3. WAR hazard


1.RAW hazard : ( read after write)

Instruction ‘j’ tries to read a source operand before instruction ‘i’ writes it.


2.WAW hazard :( write after write)

Instruction ‘j’ tries to write a source operand before instruction ‘i’ writes it.

3.WAR hazard :( write after read)

Instruction ‘j’ tries to write a source operand before instruction ‘i’ reads it.


46. How data hazard can be prevented in pipelining?

Data hazards in the instruction pipelining can prevented by the following techniques.

· Operand Forwarding

· Software Approach


47. Define the term Clock Rate.

They are two possibilities for increasing the clock rate, R. First, improving the IC technology makes logic circuits faster, which reduces the time needed to complete a basic step. This allows the clock period P to be reduce and the clock rate R to be increased. Second, reducing the amount of processing done is one basic step also makes it possible to reduce the clock period P.


48. How Compiler is used in Pipelining?

A compiler translates a high level language program into a sequence of machine instructions. To reduce N, we need to have suitable machine instruction set and a compiler that makes good use of it. An optimizing compiler takes advantages of various features of the target processor to reduce the product N*S, which is the total number of clock cycles needed to execute a program. The number of cycles is dependent not only on the choice of instruction, but also on the order in which they appear in the program. The compiler may rearrange program instruction to achieve better performance of course, such changes must not affect of the result of the computation


49. What is meant by Anti dependence?

A statement S2 is anti dependent on S1 if and only if S2 modifies a resource that S1 reads and S1 precedes S2 in execution. The following is an example of an anti dependence: S1 x: = y + c
S2 y: = 10

Here, S2 sets the value of y but S1 reads a prior value of y.
50. What is Output dependence?

A statement S2 is output dependent on S1 (written) if and only if S1 and S2 modify the same resource and S1 precedes S2 in execution. The following is an example of output dependence:
S1 x: = 10
S2 x: = 20

Here, S2 and S1 both set the variable x.


Posted by Roy Antony Arnold at 2:01 AM 0 comments
Labels: Computer Architecture
Computer Architecture - Set 4


31. Compare horizontal and vertical organization .Give their advantages and disadvantages?

Comparison of Horizontal and Vertical organization:-


Horizontal
Vertical

v Long formats.

v Ability to express a high degree of parallelism.

v Little encoding of control information.

v Useful when higher operating speed is desired.
Short formats

Limited ability to express parallel micro operations.

Considerable encoding of control information.

Slower operating speeds.




ADVANTAGES AND DISADVANTAGES:

The horizontal organization is suitable when operating speed computes a critical factor and where machine structure allow parallel usage of the resources.

Less bits are required the microinstruction.

In vertical approach the significant factor is reduced for parallel hardware required to handle execution of microinstructions.

DISADVANTAGES:

Vertical approach results in slower operations.


32. Explain the various approaches used to deal with Conditional pipelining?

* A condition branch instruction introduces the added hazard caused by the dependency of branch condition on result of a preceding instruction.

* Branching instruction represent about 20 percent of the dynamic interaction count of most programs.

* The dynamic count is the number of instruction execution, taking into account the that same program instruction are executed many times because of loops.

These branching junctions can le handled by following ways,

1. Delayed branch.

2. Branch prediction.

3. Dynamic branch prediction


33. How addressing modes affect the instruction pipelining?

Degradation of performance is an instruction pipeline may be due to address dependency where operand address cannot be calculated without available informatition needed by addressing mode for e.g. An instructions with register indirect mode cannot proceed to fetch the operand if the previous instructions is loading the address into the register. Hence operand access is delayed degrading the performance of pipeline.


34. Give the advantage and disadvantages of complex Addressing modes?


Advantages:

1. Simplifies the memory references.

2. Produces variable length instructions format.

3. Instruction manipulates operands in memory directly.


Disadvantages:

1. Hardware logic is needed to implement addressing mode which

Causes computation to slow down.

2. Some specialized takes are done which is used infrequently.

3 .conditional codes break the sequence of instruction stream causing

Difficulties this can be handled by using a procedure called branch


35. What is superscalar processor?

Super scalar processor exploits parallelism which has

Multiple E_ Unit each of which is pipelined and it constitutes independent

Instruction pipeline. The processor has PCU designed to fetch and decode

Several instruction concurrently which is issued to pipelined E_Units that

Executes several instruction is the same.


36. What do you mean by out-of order execution? Is it Desirable?

In a pipelined processor with several instructions is process concurrently it is

Possible for instruction to finish out of sequence, one instruction finishes before

Another which is issued earlier. as for as main computation is concerned no

Hazards will happen but if an interrupts occurs it creates the problem.


37. How the interrupt is handled during exception?

* cpu identifies source of interrupt

* cpu obtains memory address of interrupt handles

* pc and other cpu status information are saved

* Pc is loaded with address of interrupt handler and handling program to handle it.


38. List out Various branching technique used in micro program control unit?

a) Bit-Oring

b) Using Conditional Variable

c) Wide Branch Addressing


39. What are Hazards?

A hazard is also called as hurdle .The situation that prevents the next

instruction in the instruction stream from executing during its designated

Clock cycle. Stall is introduced by hazard. (Ideal stage)


40. Compare hardwired control unit and microprogrammed control unit
Attitude
Hardwired Control
Micro Programmed control





Speed
Fast
Slow

Control function
Implemented in hardware
Implemented is software

Flexibility
Not flexible, to accommodated new system specifications or new instructions.
More flexible, to accommodate new system specifications or new instructions redesign is required.

Ability to handle large complex instruction set
Some what difficult
Easier

Ability to support operating systems and diagnostic features.
Very difficult
Easy

Design process
Somewhat complicated
Orderly and Systematic

Applications
Mostly RISI Micro processor
Mainframes, Some Micro Processors

Instruction size
Usually under 100 instructions
Usually over 100 instructions.

ROM size
-------
2k to 10k by 20-400 bit Microinstructions.

Chip area Efficiency
Uses least area
Uses more Area


Computer Architecture - Set 3


21. List out rules for Booth recoded multiplier?


1. Start from LSB check each bit one by one.

2. Change the first one as -1.

3. Skip all succeeding ones (record them as zero’s) until you see a zero,

Change this zero as one.

4. Continue to look for next one without disturbing zeros, proceed using

Rules 2&3.

Ex: - 01110? (14)


Recoded form: 100-10

22. List put the rules for mul /div of floating point number?

Multiply rule:

1. Add the exponent and subtract 127,

2. Multiply the mantissa and determine the sign of the result.

3. Normalise the resulting value, if necessary.


Divide rule:

1. Subtract the exponents and add 127,

2. Divide the mantissa and determine the sign of the result,

3. Normalise the resulting value, if necessary.


23. Write short notes on?

a) Guard bits.

b) Truncation.


24. Define the following terms.

1) Overflow

2) Underflow

Overflow:

In the single precision, if the number requires a exponent greater then +127 or in a double precision, if the number requires an exponent form the overflow occurs.

Underflow:

In a single precision ,if the number requires an exponent less than -26 or in a double presition,if the number requires an exponent less than -1022 to represent its normalized form the underflow occurs.


25. What are Number Notations?

Most of the programming languages allow to specify the variable values or numbers in various types of number system such as binary, decimal, hexadecimal etc. To tell the assembler that the number is specified using particular number system, assembly language provides number notation for each number system that it supports


26. What is the principle of booth multiplication?

Booth multiplication is nothing but addition of properly shifted multiplicand patterns.

It is carried out by following steps:

a) Start from LSB. Check each bit one by one.

b) Change the first one as -1.

c) Skip all exceeding one’s (record them as zeros) till you see a zero. Change this zero as one.

d) Continue to look for next one without disturbing zeros, precede using rules b), and c)


27. What do you mean by Register transfer?

Instruction execution involves a sequence of steps in which data are transferred from one register to another. For each register, two control signals are used to place the contents of that register on the bus or to load the data on the bus in to the register.

To transfer the contents of the register R1 to R4

(1)Enable the output of R1 by setting R1out to 1. This places the contents of R1 on the process bus.

(2)Enable the input of Register R4 by setting R4in to 1.This loads data from processor bus in to Register R4.


28.What is micro programming and micro programmed control unit?

Microprogramming is a method of control unit design in which the control unit selection and sequencing information are stored in ROM and RAM’s called control store or control memory.Micro programmed control unit is a general approach used for implementation of control unit. Here control signals are generated by a program similar to machine language programs


29. What is meant by hardwired control?

· It is the one that contains control units that use fixed logic circuits to interpret instructions and generate control signals from them.

· Here, the fixed logic circuit block includes combinational circuit that generates the required control outputs for decoding and encoding functions.


30. What is the neccesity of grouping signals?

· It is used to reduce the number of the bits in the microinstruction.

· It is used to overcome the drawbackof assigning individual bits to each control signal results in long microinstructions,because the number of the required signals is usally large,moreoveronly a few bits are used in any given instruction.


36. List the techniques used for grouping of the control signals?

a) Vertical organization

b) Horizontal organization


Computer Architecture - Set 2


11. . what are Condition Codes (CC)? Explain the use of them.

Condition Codes are the list of possible conditions that can be tested during conditional instructions.CC is used to test the condition (<, =,>).

Based on this result, Jump instructions move to specified loop.CC flags represent the value of processor that keeps the information about the results of various operations for use by conditional branches


12. What are addressing modes?

Ø The different ways in which the location of an operand is specified in an instruction is referred to as addressing modes.

Ø It is a rule for interpreting or translating addresses field of an instruction into an effective address from where the operand is actually referenced.


13. Define absolute addressing?

Absolute addressing is defined as the operand is in a memory location. The address of this location is given explicitly in the instruction. It may also called as direct addressing.


Assembler syntax:

LOC


Addressing function:

EA=LOC


Where,

EA=Effective address


14. Define index mode?

Index mode is defined as the effective address of the operand is generated by adding a constant value to the contents of a register.

Symbolic Representation,

X(Ri)

Where,

X is a constant value

Ri is the name of the register.

Addressing function,

EA=[Ri]+X

15. What are Number Notations?

When dealing with numerical values, it is often convenient to use the familiar decimal notation. These values are stored in the computer as binary numbers. In some situations it is more convenient to specify the binary patterns directly. Most assemblers allow numerical value to be specified in different ways.

For example the number 93 which is represented by the 8-bit binary number 01011101. If this value is to be used as an immediate operand, it can be given as a decimal number.

ADD #93, R1

or as a binary number identified by a prefix symbol such as a percent sign

ADD #%01011101, R1

Binary numbers can be written more compactly as Hexadecimal. The hex notation of a first ten pattern 0000,0001,……..1001 are represented by the digit 0,1,2……..9 as in BCD .The remaining six 4-bit patterns are represented as A,B,C,D,E,F. a hex representation is identified by a dollar sign prefix

ADD #$5D, R1


16. List out the methods used to improve system performance.

The methods used to improve system performance are

Processor clock

Basic Performance Equation

Pipelining

Clock rate

Instruction set

Compiler


17. What is Byte Addressability?

Byte Addressability is used for assigning successive memory

address to successive memory location.This type of assigning is used in modern computers.


One byte=8 bits.

Ex:32bits


8bits
8bits
8bits
8bits


Address:0,4,8....




18. Convert the following binary numbers into booth recorded form.


1)11010 Booth recrded form =0-11-10


2)14 Booth recorde form=100-10.


19. List the two techniques used for speeding up the multiplication process:

The two techniques used for spreading up the multiplication process are


1)Bit pair recording or modified Booth algorithm

2)Carry save addition of summands.


20. What are the advantages of Booth algorithm?


1. It handles both positive and negative multipliers uniformly.

2. It achieves some efficiency in the no. of additions required

When the multiplier has a few large blocks of 1’s.

3. The speed gained however by skipping over 1’s depends on

The data.

Computer Architecture - Set 1


1. Define processor clock and clock rate

Processor clock:

Processor circuits are controlled by a timing signal called processor clock,the clock defines regular time interval called clock cycle.

Clock Rate:

Clock rate,R=1/p cycles/sec(hz)

Where p is length of one clock cycle


2. Explain the relation of throughput with execution and response time

Throughput:

The total amount of work done in a given time

Let us consider 2 cases:

1.) Replacing the processor in a computer with a faster version

2.) Adding additional processor to a system that uses multiple processors for separate task.Ex:Handling an airline reservation systems.

Decreasing response time almost always improves throughput.So,in case 1 both response time & throughput increases.In case2 none of the task gets work done faster,so throughput increases.However, the demand for processing in the 2nd case was almost as large as the throughput,the system might force requests to queue up.Int this case increasing the throughput could also increase the response time,since it would decrease the waiting time in queue.Thus,in many real computer systems,changing either execution time or throughput often affects the other.


3. .Define MIPS Rate and Throughput Rate.

MIPS:
One alternative to time as the metric is MIPS(Million Instruction Per Second)

MIPS=Instruction count/(Execution time x1000000).

This MIPS measurement is also called Native MIPS todistinguish it from some alternative definitions of MIPS.

MIPS Rate:

The rate at which the instructions are executed at a given time.

Throughput:

The total amount of work done in a given time.

Throughput rate:

The rate at which the total amount of work done at a given time.


4. What is MFLOPS?What is its significant?

Popular alternative to execution time is Million Floating-point Operations Per Second ,abbreviated megaflops orMFLOPS but always pronounced “megaflops”.The formula for MFLOPS is simply the definition of the acronym:

MFLOPS=Number of floating-point operations in a program/(Execution timex1000000).

A MFLOPS rating is dependent on the program.Different programs require the execution of different number of floatin point operations.Since MFLOPS were intended to measure floating-point performance,they are not applicable outside that range.Compilers,as an extreme example,have aMFLOPS rating near 0 no matter how fast the machine is,because compilers rarely use floating-point arithmetic.


5..Define CPI

The term ClockCyclesPerInstruction Which is the average number of clock cycles each instruction takes to execute, is often abbreviated as CPI.

CPI= CPU clock cycles/Instruction count.




6. State and explain the performance equation?

Suppose that the average number of basic steps needed to execute one machine instruction is S, where each basic step is completed in one clock cycle. If the clock cycle rate is R cycles per second, the program execution time is given by

T = (N x S) / R

This is often referred to as the basic performance equation.




7. What do you mean by aligned and unaligned address?

aligned address:

· In the case of 32bit word length, natural word boundaries occur at address 0,4,8…………the word locations have aligned address.

· In general, words are said to be aligned in memory if they begin at a byte address that is a multiple of the number of bytes in a word.

· FOR EXAMPLE:

If the word length is 16(2bytes), aligned words begin at byte address 0, 2, 4

unaligned address:

· There is no fundamental reason why words cannot begin at an arbitrary byte address. The words are said to have unaligned address.

While the most common case is to use aligned address, some computers allow the unaligned word address


8. What is the assembly language notation? Give example.

to represent machine instructions and program. we use assembly Language format.

For example:

The statement specifies an instruction that causes the transfer described above, from memory location LOC to processor registerR1.

Move LOC, R1

The contents of LOC are unchanged by the execution of this instruction, but the old contents of register R1 are overwritten.

The second example of adding two numbers contained in processor registers R1 and R2 and placing their sum in R3 can be specified by the assembly language statement and the assembly language statement can specify R2 and placing their sum inR3.

Add R1, R2, R3.


9. What is straight –line sequencing?

Process of fetching and executing an instruction; one at a time in order of increasing address with the help of information in program counter.


10. Specify the sequence of operation involved when an instruction is executed.

a) Instruction Fetch

b) Instruction Decode

c) Operand Fetch

d) Execute

f) Write Back




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