504185 ELECTIVE II
MEMORY TECHNOLOGIES
Teaching Scheme Examination Scheme
Lectures: 3 Hrs./Week Theory: 100 Marks
Credit: 3
Static Random Access Memories (SRAMs), SRAM Cell Structures, MOS SRAM
Architecture, MOS SRAM Cell and Peripheral Circuit, Bipolar SRAM, SOl, Advanced SRAM
Architectures, Application Specific SRAMs; DRAMs, MOS DRAM Cell, BiCMOS DRAM, Error
Failures in DRAM, Advanced DRAM Design and Architecture, Application Specific DRAM, High
Density ROMs, PROMs, Bipolar & CMOS PROM, EEPROMs, Floating Gate EPROM Cell, OTP
EPROM, EEPROMs, Nonvolatile SRAM, Flash Memories. RAM Fault Modeling, Electrical
Testing, Pseudo Random Testing-Megabit DRAM Testing-Nonvolatile Memory Modeling and
Testing-IDDQ Fault Modeling and Testing-Application Specific Memory Testing. General
Reliability Issues, RAM Failure Modes and Mechanism, Nonvolatile Memory, Reliability Modeling
and Failure Rate Prediction, Reliability Screening and Qualification. Radiation Effects, SEP,
Radiation Hardening Techniques. Process and Design Issues, Radiation Hardened Memory
Characteristics, Radiation Hardness Assurance and Testing, Ferroelectric Random Access Memories
(FRAMs), Gallium Arsenide (GaAs) FRAMs, Analog Memories, Magneto Resistive Random
Access Memories (MRAMs), Experimental Memory Devices. Memory Hybrids (2D & 3D),
Memory Stacks, Memory Testing and Reliability Issues, Memory Cards, High Density Memory
Packaging, Future Directions, Introduction to digital tablet PC, LCD, DVD player etc.
References:
1. Ashok K.Sharma, " Semiconductor Memories Technology, Testing and Reliability ",Prentice-
Hall of India Private Limited, New Delhi, 1997.
2. Memories”, Springer Publication.
3. Wen C. Lin, “Handbook of Digital System Design”, CRC Press.
Reference http://www.unipune.ernet.in/stud_info/Syllabi/Syllabus_2008.html
|
No responses found. Be the first to respond...
|