Janardan Rai Nagar Rajasthan Vidyapeeth MSCI03-ELECTRONIC INSTRUMENTS AND SYSTEMS University model question papers



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Posted Date: 19 Jul 2008      Posted By:: Vidya    Member Level: Gold  Points: 5 (₹ 1)

2005 Janardan Rai Nagar Rajasthan Vidyapeeth M.Tech. Computer Science MSCI03-ELECTRONIC INSTRUMENTS AND SYSTEMS University Question paper



Course: M.Tech. Computer Science   University/board: Janardan Rai Nagar Rajasthan Vidyapeeth





MASTER OF TECHNOLOGY
(SEMESTER - IV) (ELECTICAL)
(SPL-1 : CONTROL & INSTRUMENTATION)


MSCI03-ELECTRONIC INSTRUMENTS AND SYSTEMS


TIME: 03 HOURS MAX. MARKS: 75

GENERAL INSTRUCTIONS:
1. Question paper is divided into three groups
2. Each group is of 25 marks each
3. Figure to the right in bracket indicates mark
4. Assume suitable data if necessary

GROUP A: Answer any three questions. Question No. 1 is compulsory.
Q.1: List the causes of failures. (05)
Q.2: What are the methods of identifying faults and the stages. (10)
Q.3: Write down the soldering procedure. (10)
Q.4: Explain the principle of PMMC multimeter. (10)
Q.5: What are the factors on which capacitance depends. (10)


GROUP B: Answer any three questions. Question No. 6 is compulsory.
Q.6 What are the typical faults in rectifier and filter circuits. (05)
Q.7 Explain the principle of a frequency counter and explain how it is used
for measurement of frequency and time period? (10)
Q.8 Explain the principle of operation of a Cathode Ray Oscilloscope. (10)
Differentiate between the duel trace and duel beam oscilloscope
Q.9: What are logic family characteristics. Explain/Define each of
them. (10)
Q.10: Give the steps for measurement of load regulation. (10)






GROUP C: All Questions are Compulsory.
Q.11 Fill in the blanks (each question carries 2 marks)
(i) An op-amp has _________ voltage sources.
(ii) In an ideal op-amp, the open loop gain is ___________.
(iii) Inverting terminal is marked with minus sign. A high negative signal at it will make the output stuck at _________.
(iv) Typical voltage across a LED is ____________.
(v) The d.c. voltage at the collector will be ________ when RC is open.
Q.12 Multiple choice question. (Each question carries 2 marks)
(i) PMMC uses cells for the measurement of ___________.
(a) Current (b) Voltage
(c) Resistance (d) Power
(ii) The bridge used for precision measurement of capacitance is __________.
(a) Owen's bridge (b) Manwell bridge
(c) Hay's bridge (d) Schering bridge
(iii) Time constant of a RC circuit is always _________.
(a) RC second (b) R/C second
(c) C/R second (d) 1 second
(iv) For matching low impedance of the load with high impedance of the source which transformer is required ____________.
(a) Step up (b) Step down
(c) (a) and (b) (d) not possible
(v) The main advantages of CMOS is __________.
(a) Very high gain (b) High current
(c) Low value gain (d) Very low dissipation

Q.13 True or false (each question carries 1 mark).
(i) 3 ½ digit meter triples the range.
(ii) Clock frequency is 1Hz and if 1 million pulses of the input signal pass through the AND gate in one clock pulse, the frequency of the input signal is 10 MHz
(iii) DC voltage can be connected to an electrolytic capacitor in any way.
(iv) In a low power FET, resistance between drain and gate, or gate and source are equal.
(v) Although gain of an OP-amp in very high, it disegiminates between the interference signal and the derived signal.






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