Janardan Rai Nagar Rajasthan Vidyapeeth DIGITAL ELECTRONICS University model question papers



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Posted Date: 04 Sep 2008      Posted By:: Megha    Member Level: Silver  Points: 5 (₹ 1)

2007 Janardan Rai Nagar Rajasthan Vidyapeeth B.Tech Electrical Engineering DIGITAL ELECTRONICS University Question paper



Course: B.Tech Electrical Engineering   University/board: Janardan Rai Nagar Rajasthan Vidyapeeth





BIT - III TOTAL PAGES:03
BACHELOR IN TECHNOLOGY
(SEMESTER - III) (AERONAUTICAL/COMPUTER/ELECTRICAL/ELECTRONICS & TELECOMM./)
BSAE4/BSCO4/BSE4/BSET4 – DIGITAL ELECTRONICS
TIME: 03 HOURS MAX. MARKS: 75

GENERAL INSTRUCTIONS:
1. Question paper is divided into three groups
2. Each group is of 25 marks each
3. Figure to the right in bracket indicates mark
4. Assume suitable data if necessary

GROUP A: Answer any three questions. Question No. 1 is compulsory.
Q.1 What is flip-flop? Explain R-S flip flop ? (05)
Q.2 Explain Gray code? Explain conversion of binary to gray code and gray to binary with examples. ? (10)
Q.3 Short note on Half adder ? (10)
Q.4 Write all gates and explain any two gates in detail ? (10)
Q.5 Short note on (10)
a) Exclusive-NOR gate.
b) NAND gate
c) NOT gate
GROUP B: Answer any three questions. Question No. 6 is compulsory.

Q.6 Short note on full adder ? (05)
Q.7 Prove that the largest 4-digit octal number when subtracted from the larger 3- digit hexadecimal number yields zero in decimal ? (10)
Q.8 Briefly explain why a ripple counter's maximum usable clock frequency decreases as more flip-flops are added to the counter to increase its MOD-number why is maximum usable clock frequency in case of a synchronous counter independent of clock frequency ? (10)
Q.9 Convert (10)
a) (176.F)16 to Decimal.
b) (110011)2 to Hexadecimal
c) (19.25)10 to binary.
Q.10. What are registers? Explain shift register ? (10)




GROUP C: All Questions are Compulsory.
Q.11 Fill in the blanks (each question carries 2 marks)
(i) Adding (24)16 to (FE1)16 produces ____________
(ii) A ______________ is a digital function that produces the arithmetic sum
of two binary numbers in parallel .
(v) The __________ MOS conducts when its gate to source voltage is
positive
(iv) x+xy =_____________ and F, F =_____
(v) Data selectors are basically the same as ______________
Q.12 Multiple choice question. (Each question carries 2 marks)
(i) ASC11 is
(a) American standard code of information institution
(b) American standardized convert international information
(c) American standardized converten information institution
(d)American standard code of information intercharge
(ii) SOP is
(a) Standard of product
(b) Standard of pass
(c) Sum of product
(d) Sum of pass
(iii) D flipflop stands for
(a) Delay FF
(b) Data FF
(c) Decay FF
(d) Del FF
(iv) AND logic is
(b) Subtraction logic
(c) Addition logic
(d) Multiplication logic
(e) Division logic
(v) Standard SOP form consist of
(a) Min term
(b) Max term
(c) Multiple terms
(d)Minimized terms

Q.13 True or false (each question carries 1 mark).
(i) NOR gate is universal gate
(ii) RAM is random access memory
(iii) Byte is group of 16 bits
(iv) Following symbol for MAND gate



(v) PISO is parallel in serial out






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